This file introduces the features and characteristics of the TSB12LV32 TSB12LV32I product, which is a general-purpose link-layer controller that is compliant with IEEE 1394-1995 and P1394a and can be used for computer peripherals and consumer audio/video electronics.
The TSB12LV32 (GP2Lynx) is a general‑purpose IEEE‑1394a‑2000 link‑layer controller that transfers data between a 1394 PHY, an external host controller, and devices attached to its data‑mover port. It provides 2‑Kbyte receive and transmit FIFOs, supports 8‑bit or 16‑bit host bus interfaces, and can operate at clock frequencies up to 60 MHz. The device can act as a 1394 cycle master, bus manager, and isochronous resource manager, with two‑channel receive and four‑channel transmit capability.
The controller is offered in a 100‑pin Plastic Quad Flatpack (LQFP PZ) package, with a single 3.3‑V supply (5‑V tolerant) and complies with RoHS and other TI packaging standards. Detailed packaging, mechanical drawings, and warranty information are included in the datasheet.
| Data Bus Width | 8‑bit or 16‑bit |
|---|---|
| Supply Voltage | Single 3.3 V (5 V tolerant) |
| General Receive FIFO | 2 KB |
| Asynchronous Transmit FIFO | 2 KB |
| Package Type | 100‑pin LQFP PZ |
| Package Material | Plastic Quad Flatpack |
The device operates from a single 3.3 V supply and is tolerant of up to 5 V.
It is offered in a 100‑pin Plastic Quad Flatpack (LQFP PZ) package.