The M74HC573 is a high speed CMOS Octal latch with 3-state outputs fabricated with silicon gate C2MOS technology. This 8-Bit D-Type latches is controlled by a latch enable input (LE) and output enable input (OE). While the LE input is held at a high level, the Q outputs will follow the data input precisely. When LE is taken low, the Q outputs will be latched precisely at the logic level of D input data. While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic level) and while is at high level the outputs will be in a high impedance state. The 3-State output configuration and the wide choice of outline make bus organized system simple. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
The M74HC573 is an octal D‑type latch with three‑state outputs, fabricated in high‑speed CMOS technology. It features a latch enable (LE) input, an output enable (OE) input, and eight data inputs (D0‑D7) that are latched when LE goes low. The device operates over a wide supply voltage range and includes protection against static discharge.
The datasheet provides absolute maximum ratings, recommended operating conditions, DC and AC electrical characteristics, capacitive parameters, waveform timing diagrams, and mechanical dimensions for the DIP, SOP, and TSSOP packages. Key specifications include a supply voltage range of 2 V to 6 V, propagation delays around 115 ns, and a maximum power dissipation of 500 mW.
| Supply Voltage (Operating) | 2 V to 6 V |
|---|---|
| Supply Voltage (Absolute Max) | -0.5 V to +7 V |
| Power Dissipation (max) | 500 mW |
| Storage Temperature | -65 °C to +150 °C |
| Lead Temperature (10 s) | 300 °C |
The device is specified to operate from 2 V up to 6 V.
The maximum power dissipation is 500 mW (at 65 °C).
The part can be stored from –65 °C to +150 °C.