This document describes the Teridian Semiconductor Corporation 73S1209F chip, which is a versatile and economical CMOS System-on-Chip device intended for smart card reader applications. The chip features an ISO-7816 / EMV interface and a generic asynchronous serial interface, supports multi-card slots and multi-SAM architectures, and is suitable for low-cost PINpad reader devices.
The 73S1209F is a versatile, economical CMOS System‑on‑Chip designed for smart‑card reader applications and any UART‑to‑ISO‑7816/EMV bridge function. It integrates an 80515 core, 32 KB Flash, 2 KB XRAM, 256 B IRAM, a 5×6 keypad interface, nine user I/Os, two programmable LED drivers, and an analog voltage input for battery monitoring.
The device operates from dual supplies (digital VDD 2.7‑3.6 V, analog VPC 4.75‑5.5 V) and supports a full‑duplex UART (1.2 kbps‑115 kbps), I²C master (400 kbps), and a built‑in linear regulator for smart‑card VCC. It is offered in 68‑pin and 44‑pin QFN packages and is targeted at low‑cost PIN‑pad POS terminals, SIM readers, payphones, vending machines, and other smart‑card solutions.
| CPU core | 80515, 1 clock cycle per instruction |
|---|---|
| Maximum CPU clock | 24 MHz (up to 24 MIPS) |
| Flash program memory | 32 KB |
| XRAM (user data memory) | 2 KB |
| IRAM (internal RAM) | 256 B |
| Keypad interface | 5 × 6 matrix, hardware scanning, debouncing |
| User I/Os | 9 |
| LED outputs | 2 programmable current drivers |
| Analog input range | 1.0 V to 2.5 V |
| I²C master speed | 400 kbps |
| UART speed range | 1.2 kbps to 115 kbps |
| Operating temperature | -40 °C to 85 °C |
| Package options | 68‑pin QFN, 44‑pin QFN |
The device provides nine user I/O pins.
It includes 32 KB of Flash program memory, 2 KB of XRAM, and 256 B of IRAM.