The DS2155 is a software-selectable T1, E1, or J1 single-chip transceiver (SCT) for short-haul and long-haul applications.
The DS2155 is a software‑selectable T1, E1, or J1 single‑chip transceiver for short‑haul and long‑haul applications. It integrates a line interface unit, framer, HDLC controllers, and a TDM backplane interface, and is controlled via an 8‑bit parallel port.
The document provides functional descriptions, block diagrams, pin‑function tables, register maps, timing diagrams, package information for LQFP and CSBGA options, and detailed specifications such as temperature ranges, clock output frequencies, and supported features like dual HDLC controllers and programmable BERT.
| Package (LQFP) | 100‑pin LQFP, 0 °C to +70 °C |
|---|---|
| Package (CSBGA) | 100‑ball CSBGA, -40 °C to +85 °C |
| Clock Output Options | 16.384 MHz, 8.192 MHz, 4.096 MHz, or 2.048 MHz |
| Supported Interfaces | T1, E1, J1 line protocols |
The device supports T1, E1, and J1 line protocols as a single‑chip transceiver.
It can synthesize clock outputs of 16.384 MHz, 8.192 MHz, 4.096 MHz, or 2.048 MHz.