This datasheet introduces SN54ACT573 and SN74ACT573, which are both 8-bit D-type transparent latches with 3-state outputs specifically designed for driving highly capacitive or relatively low-impedance loads.
The SN54ACT573 and SN74ACT573 devices are 8‑bit D‑type transparent latches that provide three‑state outputs. When the latch‑enable (LE) input is high, the Q outputs follow the D inputs; when LE is low, the outputs retain the last data. An output‑enable (OE) pin allows the outputs to be placed in a high‑impedance state for bus‑sharing applications.
The datasheet includes absolute maximum ratings, recommended operating conditions, detailed electrical characteristics, timing parameters, ordering information for multiple package types (PDIP, SOIC, SSOP, TSSOP, etc.), and mechanical drawings. It also contains the standard TI product notice and warranty disclaimer.
| Supply voltage range | 4.5 V to 5.5 V |
|---|---|
| Supply voltage (Voc) | 4.5 V – 5.5 V |
| High‑level input voltage (VIH) | 2 V |
| Low‑level input voltage (VIL) | 0.8 V |
| High‑level output current | 24 mA |
| Low‑level output current | 24 mA |
| Storage temperature range | -65 °C to 150 °C |
| Pulse duration, LE high | 3.5 ns – 5 ns |
The devices operate from 4.5 V to 5.5 V.
Both the high‑level and low‑level output currents are rated at 24 mA.
They can be stored from –65 °C up to 150 °C.
Available packages include PDIP, SOIC (DW), SSOP (DB), and TSSOP (PW) among others.