Technical parameters of Mobile SDRAM of Micron Technology, Inc.
This document describes Micron's 128‑Mb mobile SDRAM families, including the 8‑Meg × 16 (MT48LC8M16LFFF, MT48V8M16LFFF) and 4‑Meg × 32 (MT48LC4M32LFFC, MT48V4M32LFFC) devices. Key features are temperature‑compensated self‑refresh, programmable burst lengths, auto‑precharge, low‑voltage operation, and industrial temperature range.
The datasheet provides functional block diagrams, detailed pin‑out tables for 54‑ball and 90‑ball FBGA packages, timing parameters, command truth tables, electrical characteristics, and device‑marking information for engineering and production parts.
| Capacity | 128 Mb (8 Meg × 16) or 128 Mb (4 Meg × 32) |
|---|---|
| Maximum Clock Frequency | 125 MHz (8 ns cycle) at CL = 3 |
| Refresh Interval | 64 ms, 4 096‑cycle refresh |
| Operating Temperature Range | -40 °C to +85 °C (Industrial) |
The SDRAM can operate up to 125 MHz, corresponding to an 8 ns cycle time at CL = 3.
They use a 64 ms refresh interval with a 4 096‑cycle refresh count.