This document introduces the features of 82C59A CMOS priority interrupt controller, including product compatibility, operating mode, power characteristics, etc.
The 82C59A is a high‑performance CMOS priority interrupt controller designed to offload interrupt handling from the CPU. It supports up to eight vectored interrupt sources, can be cascaded to 64, and operates with low power consumption. The device is compatible with a range of microprocessors such as the 80C286, 80286, 80C86/88, 8086/88, 8080/85 and NSC800.
The datasheet details pin configurations, functional blocks, register maps (IRR, ISR, IMR), interrupt sequences for both 8080/85 and 80C86/88/286 modes, programming command words, and mechanical specifications including package types, temperature range, and electrical characteristics.
| Supply Voltage | 5 V |
|---|---|
| Operating Temperature Range | -40 °C to +85 °C |
| Package Types | 28‑lead PDIP or 28‑lead PLCC |
| Maximum Supply Current (ICCSB) | 10 µA |
| Maximum Supply Current (ICCOP) | 4 mA/MHz |
| Available Speed Versions | 5 MHz, 8 MHz, 12.5 MHz |
| Interrupt Sources | Up to 8 vectored sources, expandable to 64 |
It can handle up to eight vectored priority interrupting sources and can be cascaded to support up to 64 sources.
The device operates from a single 5 V power supply.
It is compatible with 80C286, 80286, 80C86/88, 8086/88, 8080/85 and NSC800 processors.
The chip is offered in 28‑lead PDIP and 28‑lead PLCC packages.