This document introduces the low-power features of Atmel PLDs, including the various density classes of Atmel PLDs and Atmel PLD's Input Transition Detection (ITD) technology. Atmel PLD's Input Transition Detection technology can significantly reduce power consumption.
The document introduces Atmel’s low‑power programmable logic devices (PLDs) that incorporate Input Transition Detection (ITD). The ITD feature automatically places the device in a standby or sleep mode when no input transitions occur, and wakes it up instantly when activity is detected, helping designers meet strict power budgets for portable and battery‑operated products.
Design guidelines are provided, including recommended decoupling capacitor values, handling of unused I/O pins, clock frequency considerations, and input setup time requirements. The note also outlines the different PLD families (standard, low‑power, quarter‑power, low‑voltage) and their power‑saving characteristics.