This document introduces the features of the C8051F300 MCU, including the 80C52X2 core, 32-bit Flash EEPROM, 6-channel programmable counter array, 512-byte expanded RAM, USB 1.1 and 2.0 full-speed compatible module, etc.
This handbook describes the AT89C5131A-M 8‑bit microcontroller, its core architecture, memory resources, and integrated USB functionality. It includes a feature overview, block diagram, pinout tables, and detailed signal descriptions for peripherals such as UART, SPI, TWI, timers, and the programmable counter array.
The document also covers power‑management modes, hardware watchdog operation, electrical characteristics, ordering information, and packaging options. It serves as a reference for designers and developers implementing the device in embedded applications.
| Maximum Core Frequency (X1 Mode) | 48 MHz |
|---|---|
| Core Frequency (X2 Mode) | 24 MHz |
| On‑chip Flash | 16/32 KB |
| Scratchpad RAM | 256 Bytes |
| Expanded RAM (ERAM) | 1024 Bytes |
| USB Speed | Full‑Speed USB 1.1 and 2.0 |
| Package Types | PLCC52, VQFP64, QFN32 |
It can run up to 48 MHz in X1 mode and 24 MHz in X2 mode.
It supports a control endpoint (EP0) and up to six programmable endpoints (EP1‑EP6).
The device includes 16 KB or 32 KB of flash memory.
It is offered in PLCC52, VQFP64, and QFN32 packages.