This document describes the features and characteristics of Xilinx's DS057 (v1.1) product. The product has a pin-to-pin logic delay of 5ns and a system frequency of up to 178MHz. It includes 72 macrocells and 1600 usable gates. The product is optimized for high-performance 3.3V systems and offers low power operation and 5V tolerant I/O pins. It supports in-system programmability, with superior pin-locking and routability using the FastCONNECT II switch matrix. The product also features wide function blocks, individual output enable per pin, input hysteresis, bus-hold circuitry, and full IEEE Standard 1149.1 boundary-scan (JTAG) support. Fast concurrent programming and slew rate control are also available.