Texas Instruments manuals, page 23
TEXAS INSTRUMENTS VSP2232 handbook
The VSP2232 is a complete mixed-signal processing IC from Texas Instruments (TI) for digital cameras that provides signal conditioning and analog-to-digital conversion for the output of a CCD array.
TEXAS INSTRUMENTS DEM-PCM3500 handbook
This document is the datasheet of DEM-PCM3500, which introduces the features and characteristics of the product.
TEXAS INSTRUMENTS OPA3684 handbook
OPA3684 is a low-power, triple current-feedback operational amplifier from Texas Instruments. It features a 170MHz bandwidth, 1.7mA supply current, 120mA output current, and can operate in a single supply of 5V to 12V or a dual supply of ±2.5V to ±6.0V.
TEXAS INSTRUMENTS DEM-DAI1742 handbook
DEM-DAI1742 is a complete evaluation platform for the PCM1742 24-bit, 192kHz stereo audio Digital-to-Analog Converter (DAC) from Texas Instruments (TI). The platform includes all necessary connectors and circuitry for interfacing to audio test systems and commercial audio equipment.
TEXAS INSTRUMENTS DEM-ADS1216 handbook
The DEM-ADS1216 is a high-resolution analog-to-digital converter from TI. This evaluation board is used to evaluate the performance of the ADS1216. It supports 24-bit no missing code performance and has 8 input channels that can be configured as up to 8 differential channels. The multiplexer is followed by a programmable gain amplifier with selectable gains of up to 128. Hardware options include user defined clock frequency, internal or external reference, and input biasing. All of the ADS1216's features and functionality can be exercised using the pull-down menus available from the DEM-ADS1216 software.
TEXAS INSTRUMENTS CDCV857B CDCV857BI handbook
cdcv857b is a low-delay clock distributor from texas instruments that can distribute a single differential clock input to 10 differential clock outputs. the frequency range is 60mhz to 200mhz. the device supports spread spectrum clock, the static phase offset is ±50ps, the period jitter is ±35ps, and the device enters low-power mode when no clk input signal is applied or pwrdwn is low. the device is powered by dual 2.5v supplies and is packaged in a 48-pin tssop or 56-ball microstar juniorbga.
TEXAS INSTRUMENTS CDCV857A handbook
The CDCV857A is a high-performance, low-skew, low-jitter zero delay buffer that distributes a differential clock input pair (CLK, CLK) to ten differential pairs of clock outputs (Y[0:9], Y[0:9]) and one differential pair of feedback clock output (FBOUT, FBOUT). The clock outputs are controlled by the clock inputs (CLK, CLK), the feedback clocks (FBIN, FBIN), and the analog power input (AVDD). When PWRDWN is high, the outputs switch in phase and frequency with CLK. When PWRDWN is low, all outputs are disabled to high impedance state (3-state), and the PLL is shut down (low power mode). The device also enters this low power mode when the input frequency falls below a suggested detection frequency that is below 20 MHz (typical 10 MHz). An input frequency detection circuit wi
TEXAS INSTRUMENTS CDCV857 handbook
CDCV857 is a 2.5V phase-locked loop (PLL) clock driver from TI, which is used for double data rate synchronous DRAM applications. The device adopts low-power design, and has low jitter, low skew, zero delay and other characteristics. Its working frequency range is 60MHz to 200MHz, and it can drive 10 differential clock outputs. When the input clock frequency is lower than 20MHz, the device will enter low power mode, and shut down the PLL.
TEXAS INSTRUMENTS CDCV855 CDCV855I handbook
The CDCV855 is a high-performance, low-skew, low-jitter zero delay buffer that distributes a differential clock input pair (CLK, CLK) to four differential pairs of clock outputs (Y[0:3], Y[0:3]) and one differential pair of feedback clock outputs (FBOUT, FBOUT). When PWRDWN is high, the outputs switch in phase and frequency with CLK. When PWRDWN is low, all outputs are disabled to a high-impedance state (3-state), and the PLL is shut down (low-power mode). The device also enters this low-power mode when the input frequency falls below a suggested detection frequency that is below 20 MHz (typical 10 MHz). An input frequency detection circuit detects the low-frequency condition and after applying a >20-MHz input signal this detection circuit turns on the PLL again.
TEXAS INSTRUMENTS CDCV850 CDCV850I handbook
The document describes a phase-locked loop clock driver for double data-rate synchronous DRAM applications. It features spread spectrum clock compatibility, operating frequency range of 60 to 140 MHz, low jitter, and the capability to distribute one differential clock input to ten differential outputs. It also includes a two-line serial interface, high-impedance state, and low quiescent current consumption.
TEXAS INSTRUMENTS CDCV304 handbook
CDCV304 is a PCI-X clock buffer produced by Texas Instruments. It operates at a frequency of 0MHz to 140MHz. The low output skew is less than 100ps. It can distribute one clock input to one bank of four output clocks. When OE is low, the output is low. CDCV304 operates at a voltage of 3.3V. It is suitable for automotive and industrial applications and has a working temperature range of -40°C to 85°C.
TEXAS INSTRUMENTS CDCU877 CDCU877A handbook
SCAS688A is a 1.8V phase-locked loop clock driver for double data rate (DDR II) applications. It is spread spectrum clock compatible and operates at a frequency range of 10 MHz to 400 MHz. It has features such as low current consumption, low jitter, low output skew, and low phase offset. It distributes one differential clock input to ten differential outputs.
TEXAS INSTRUMENTS CDCR61A handbook
The CDCR61A is an independent crystal clock generator from Texas Instruments. It supports 400MHz differential clock signal output, and provides single-ended 1/2 clock signal output. It can be selected to output 300MHz or 400MHz clock signal.
TEXAS INSTRUMENTS CDCP1803 handbook
This file is the scas727b manual for the cdcp1803 clock driver
TEXAS INSTRUMENTS CDCM7005 handbook