TEXAS INSTRUMENTS CDCV857B CDCV857BI handbook

cdcv857b is a low-delay clock distributor from texas instruments that can distribute a single differential clock input to 10 differential clock outputs. the frequency range is 60mhz to 200mhz. the device supports spread spectrum clock, the static phase offset is ±50ps, the period jitter is ±35ps, and the device enters low-power mode when no clk input signal is applied or pwrdwn is low. the device is powered by dual 2.5v supplies and is packaged in a 48-pin tssop or 56-ball microstar juniorbga.


TEXAS INSTRUMENTS CDCV857B CDCV857BI handbook - cover page
Brand
Texas Instruments
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
14
File format
PDF
File size
269 KB
Published
01 August, 2012
Updated
01 October, 2023
Model
CDCV857
MD5 checksum
ACCD8E3C142AF801B21CCCE9AD3CFDD3

About this manual

The CDCV857B is a high-performance, low-skew, low-jitter zero delay buffer designed to distribute a differential clock input pair to 10 differential pairs of clock outputs and one differential pair of feedback clock outputs. It operates from dual 2.5-V supplies and is compatible with spread spectrum clocking to reduce EMI. The device enters a low-power mode when the input frequency falls below a suggested detection frequency or when the PWRDWN pin is low.

What's inside

  • Description
  • Available Options
  • Terminal Functions
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • Electrical Characteristics
  • Timing Requirements
  • Switching Characteristics

Specifications

Operating Frequency60 MHz to 200 MHz
Supply Voltage2.5 V (nominal)
Quiescent Current< 100 µA
Low Jitter (cycle-cycle)±50 ps
Low Static Phase Offset±50 ps
Output Distribution10 Differential Outputs

Frequently asked questions

Does the device support spread spectrum clocking?

Yes, the CDCV857B is able to track spread spectrum clocking for reduced EMI.

What happens when the PWRDWN pin is low?

When PWRDWN is low, all outputs are disabled to a high-impedance state and the PLL is shut down to a low-power mode.

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