TEXAS Manuals

The SN74LV175A is a quadruple D-type flip-flop from TI that operates at a voltage range of 2-5.5 V and supports mixed-mode voltage operation. It also features complementary outputs.

SN54AHC174, SN74AHC174 HEX D-TYPE FLIP-FLOPS WITH CLEAR are TI company's six D-type flip-flops with single-rail outputs. They can be used for buffer/storage registers, shift registers, pattern generators, etc.

SN54ABT534 and SN74ABT534A are eight-bit edge-triggered D-type flip-flops with 3-state outputs. They feature state-of-the-art EPIC-II B BiCMOS design, significantly reducing power dissipation. They have latch-up performance exceeding 500 mA per JEDEC standard, output ground bounce less than 1 V, high-drive outputs, ESD protection exceeding 2000 V, and various package options.

SN54AHC374, SN74AHC374 are octal edge-triggered D-type flip-flops with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels of the data (D) inputs. A buffered output-enable (OE) input can be used to place the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly.

CD74AC273 is the enhanced version of CD54AC273, which has faster transmission speed and lower power consumption. AC273 and ACT273 devices are octal D-type flip-flops with reset that utilize advanced CMOS logic technology. Information at the D input is transferred to the Q output on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock.

SN54AHC574, SN74AHC574 are octal edge-triggered D-type flip-flops with 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. These devices are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. On the positive transition of the clock (CLK) input, the Q outputs are set to the logic levels of the data (D) inputs. A buffered output-enable (OE) input places the eight outputs in either a normal logic state (high or low) or the high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state output current consumption is very low, typically less than 100µA.

SN74F174A HEX D-TYPE FLIP-FLOP WITH CLEAR is an integrated circuit chip produced by TI. It contains 6 single-rail output D flip-flops, buffered clock and direct clear inputs, and can be used in buffer/storage registers, shift registers, and pattern generators.

This data sheet describes the features and characteristics of the SN54LVTH273/SN74LVTH273 low-voltage 8-bit D-type flip-flops.

This document describes an 8-bit flip-flop with 3-state outputs, designed for driving highly capacitive or relatively low-impedance loads. The product is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The CD4013B series is a dual D-type flip-flop from Texas Instruments (TI), which includes 14-lead hermetic dual-in-line ceramic packages, 14-lead dual-in-line plastic packages, 14-lead small-outline packages, 14-lead thin shrink small-outline packages and other packaging forms.

CD54HC173 and CD54HCT173 are high speed three-state quad D-type flip-flops fabricated with silicon gate CMOS technol- ogy. They possess the low power consumption of standard CMOS Integrated circuits, and can operate at speeds com- parable to the equivalent low power Schottky devices. The buffered outputs can drive 15 LSTTL loads. The large output drive capability and three-state feature make these parts ide- ally suited for interfacing with bus lines in bus oriented sys- tems.

This document describes the features and characteristics of the SCLS412I product, including operating voltage range, timing characteristics, and output levels. The product supports mixed-mode voltage operation, partial power-down mode, and ESD protection.

These octal flip-flops are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment.

This document is a production data manual for SN54174, SN54175, SN54LS174, SN54LS175, SN54S174, SN54S175, SN74174, SN74175, SN74LS174, SN74LS175, SN74S174, SN74S175 HEX/QUADRUPLE D-TYPE FLIP-FLOPS WITH CLEAR SDLS068A.