GSI GS300 Manuals

ManualLib has 2 documents for the GSI GS300: 2 user manuals. Every file can be read online or downloaded as a PDF for free.

User Manual 2

Key facts

Brand
GSI
Model
GS300
Industry
Industrial
Documents
2
Languages
EN
Last added
2012-05-08

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GSI GS882ZV18/36BB/D-333/300/250/200 NBT SRAM Datasheet

GSI GS882ZV18/36BB/D-333/300/250/200 NBT SRAM Datasheet

Datasheet 33 pages · 882 KB · EN

The GS882ZV18/36BB/D series is a 9 Mbit synchronous static RAM that implements No Bus Turn Around (NBT) functionality, allowing zero‑wait read‑write‑read bus utilization. It operates from a 1.8 V core and I/O supply, supports frequencies from 333 MHz down to 200 MHz, and is available in 119‑bump and 165‑bump BGA packages for both 18‑bit and 36‑bit data widths. The device offers configurable pipeline or flow‑through modes, on‑chip parity, JTAG boundary‑scan, and optional linear or interleaved burst ordering.

Functional details include separate clock, chip‑enable, write‑enable, and byte‑write signals, as well as a ZZ pin for entering a low‑power sleep mode. The SRAM includes a burst address counter, ZQ pin for drive‑strength selection, and supports both commercial and industrial temperature ranges. Ordering information lists specific part numbers for each speed and package variant.

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GSI GS300 specifications

Capacity9 Mbit
Operating Frequency333 MHz – 200 MHz
Core Supply Voltage1.8 V ±10%
Package Types119‑bump BGA and 165‑bump FPBGA
Temperature RangeCommercial and Industrial

Source: GSI GS882ZV18/36BB/D-333/300/250/200 NBT SRAM Datasheet

All GSI GS300 documents by type

Datasheet 2

Ratings, dimensions and ordering codes, for selection and design work.

Questions answered in these manuals

What does NBT stand for and what does it do?

NBT (No Bus Turn Around) functionality allows zero‑wait read‑write‑read bus utilization, eliminating turnaround cycles between read and write operations.

From: GSI GS882ZV18/36BB/D-333/300/250/200 NBT SRAM Datasheet

How is sleep mode activated on the SRAM?

Sleep mode is entered by pulling the ZZ pin high; after two clock cycles the device enters a low‑current power‑down state.

From: GSI GS882ZV18/36BB/D-333/300/250/200 NBT SRAM Datasheet

What supply voltages does the GS88237BB/D support?

It operates from either a 2.5 V or a 3.3 V core supply, with a ±10 % tolerance.

From: GSI Technology GS88237BB/D-333/300/250/200 Synchronous Burst SRAM Datasheet

Which package options are available for this SRAM?

The device is offered in 119‑bump BGA and 165‑bump BGA packages, both available in Pb‑free versions.

From: GSI Technology GS88237BB/D-333/300/250/200 Synchronous Burst SRAM Datasheet