This user guide covers the design, software, and hardware requirements for In-System Programming (ISP) of Atmel ATF15xx CPLD devices using the JTAG interface.
This manual describes the design methods and requirements for implementing In-System Programming (ISP) on Atmel ATF15xx family Complex Programmable Logic Devices (CPLDs). It details the benefits of ISP, the JTAG interface specifications, and supported device models such as the ATF1502, ATF1504, and ATF1508 series.
The guide provides instructions on using the Atmel-ISP software and hardware, including the Atmel-ISP board and various cables. It covers procedures for single-device and multiple-device programming, creating SVF, Jam, and PCF files, and offers troubleshooting guidelines for common ATMISP messages.
| Supported Devices | ATF1502AS/ASL/ASV/ASVL, ATF1504AS/ASL/ASV/ASVL, ATF1508AS/ASL/ASV/ASVL |
|---|---|
| Interface Standard | JTAG IEEE 1149.1a-1993 |
| Interface Pins | 4-pin (TCK, TMS, TDI, TDO) |
| Voltage Compatibility | 3- or 5-volt |
ISP allows devices to be programmed after they are soldered onto the circuit board, eliminating extra handling steps and reducing the risk of damage to delicate leads or through electrostatic discharge (ESD).
Yes, Atmel ISP devices can be configured as part of a JTAG daisy chain to implement parallel ISP for multiple devices simultaneously.
A JEDEC file is necessary to program any Atmel ISP devices, which can be created by compiling a design file using compiler software that supports these devices.