Texas Instruments DAC5681 16-bit 1.0 GSPS Digital-to-Analog Converter Datasheet

The DAC5681 datasheet details specifications, electrical characteristics, pin functions, and ordering information for Texas Instruments' 16‑bit 1.0 GSPS DAC.


Texas Instruments DAC5681 16-bit 1.0 GSPS Digital-to-Analog Converter Datasheet - cover page
Brand
Texas Instruments
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
47
File format
PDF
File size
1.7 MB
Published
28 September, 2026
Updated
28 September, 2026
MD5 checksum
1193C380C7804AA9E20D9B883CE73C64

About this manual

The DAC5681 is a 16‑bit digital‑to‑analog converter with a 1.0 GSPS update rate and wideband LVDS data input. It integrates an on‑chip delay‑locked loop, internal 1.2 V reference, and supports differential output currents up to 20 mA. The device is offered in a 64‑pin QFN package and is targeted at applications such as cellular base stations, broadband wireless access, and cable modem termination systems.

The datasheet provides a functional block diagram, detailed pin‑out tables, absolute maximum ratings, DC and AC electrical characteristics, digital interface specifications, and definition of performance metrics. Ordering information, package options, and recommended operating conditions are also included.

What's inside

  • Features
  • Applications
  • Functional Block Diagram
  • Pin Configuration
  • Absolute Maximum Ratings
  • Electrical Characteristics – DC
  • Electrical Characteristics – AC
  • Digital Interface Specifications
  • Ordering Information

Specifications

Resolution16 bits
Maximum Update Rate1.0 GSPS
AVDD Supply Voltage3.3 V (typical)
Operating Temperature Range-40 °C to 85 °C
Package64‑Pin QFN
Power Dissipation (Mode 1)605 mW

Frequently asked questions

What is the maximum output update rate of the DAC5681?

The DAC5681 can update its output at up to 1.0 GSPS.

What temperature range can the DAC5681 operate in?

It operates from –40 °C to 85 °C.

In which package is the DAC5681 available?

The DAC5681 is offered in a 64‑pin QFN package.

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