SI IC41C44002A/IC41C44002AS(L) IC41LV44002A/IC41LV44002AS(L) handbook

The ICSI 44002 Series is a 4,194,304 x 4-bit high-performance CMOS Dynamic Random Access Memory. These devices offer an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 2,048 random accesses within a single row with access cycle time as short as 20 ns per 4-bit word. These features make the 44002 Series ideally suited for high- bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.


SI IC41C44002A/IC41C44002AS(L) IC41LV44002A/IC41LV44002AS(L) handbook - cover page
Brand
SI
Category
Memory
Document type
Datasheet
Language
English
Pages
20
File format
PDF
File size
243 KB
Published
02 August, 2012
Updated
30 September, 2023
MD5 checksum
305C7FE512152ED0BAE1B8B9147E5628

About this manual

The document describes the IC41C44002A/IC41C44002AS(L) and IC41LV44002A/IC41LV44002AS(L) series, which are 4Mx4 bit high-performance CMOS Dynamic Random Access Memories. These devices feature Extended Data-Out (EDO) Page Mode access cycles, allowing for accelerated data retrieval in graphics and digital signal processing applications.

What's inside

  • Features
  • Description
  • Product Series Overview
  • Pin Descriptions
  • Functional Block Diagram
  • Truth Table
  • Absolute Maximum Ratings
  • Electrical Characteristics

Specifications

Capacity4M x 4-bit
Refresh Interval2,048 cycles/32 ms
Supply Voltage (Standard)5V ± 10%
Supply Voltage (Low Power)3.3V ± 10%
Package Types24-pin SOJ, TSOP-24

Frequently asked questions

What is the refresh mode for this DRAM?

The device supports RAS-Only, CAS-before-RAS (CBR), and Hidden refresh modes.

What is the minimum EDO Page Mode cycle time?

The access cycle time for 4-bit words can be as short as 20 ns.

Does the device support Self Refresh?

Yes, but this feature is available only for the 'S' version of the part.

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