The IS41C16256/IS41LV16256 is a 262,144 x 16-bit high-performance CMOS Dynamic Random Access Memories from ICSI company. The product uses EDO Page Mode accelerated cycle access, which can perform 512 random accesses within a single row with an access cycle time as short as 10 ns per 16-bit word. The Byte Write control of upper and lower byte makes the IS41C16256 ideal for use in 16-, 32-bit wide data bus systems. These features make the IS41C16256/IS41LV16256 ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems and peripheral applications.
This document describes the IS41C16256 and IS41LV16256, which are high-performance CMOS Dynamic Random Access Memories (DRAM). These devices offer an accelerated cycle access called Extended Data-Out (EDO) Page Mode, allowing 512 random accesses within a single row with short access times. They feature TTL compatible inputs and outputs, support byte write and byte read operations via two CAS controls (LCAS and UCAS), and are available in industrial temperature ranges.
| Access Mode | EDO Page Mode |
|---|---|
| Refresh Interval | 512 cycles / 8 ms |
| Operating Temperature Range | -40°C to +85°C |
| Package Types | 40-pin SOJ, 40-pin TSOP-2 |
The devices require a refresh interval of 512 cycles every 8 ms.
Yes, it supports Byte Write and Byte Read operation via two CAS controls.