Update: 30 September, 2023
This data sheet describes the ICSI IS41C16100S and IS41LV16100S 1,048,576 x 16-bit high-performance CMOS Dynamic Random Access Memories. These devices employ an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the IS41C16100S ideal for use in 16-, 32-bit wide data bus systems. These features make the IS41C16100Sand IS41LV16100S ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.
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MD5 Checksum: CF80586A943A7A857B1C1DB9F8422B2D
Publication date: 02 August, 2012
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PDF Link: SI IS41C16100S IS41LV16100S handbook PDF