This data sheet describes the ICSI IS41C16100S and IS41LV16100S 1,048,576 x 16-bit high-performance CMOS Dynamic Random Access Memories. These devices employ an accelerated cycle access called EDO Page Mode. EDO Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 20 ns per 16-bit word. The Byte Write control, of upper and lower byte, makes the IS41C16100S ideal for use in 16-, 32-bit wide data bus systems. These features make the IS41C16100Sand IS41LV16100S ideally suited for high-bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications.
The IS41C16100S and IS41LV16100S are high-performance CMOS Dynamic Random Access Memories (DRAM) with Extended Data-Out (EDO) Page Mode access. These devices offer accelerated cycle times, allowing 1.024 random accesses within a single row with an access cycle time as short as 20 ns per 16-bit word.
| Capacity | 1M x 16 (16-MBIT) |
|---|---|
| Access Mode | EDO Page Mode |
The maximum CAS Access Time (tcAC) is 15 ns.
The devices are packaged in a 42-pin SOJ and TSOP-2.