The R5105N Series are CMOS-based microprocessor supervisory circuit, or high accuracy and ultra low supply current voltage detector with built-in delay circuit and watchdog timer. When the supply voltage is down across the threshold, or the watchdog timer does not detect the system clock from the microprocessor, the reset output is generated. The voltage detector circuit is used for the system reset, etc. The detector threshold is fixed internally, and the accuracy is ±1.0%. The released delay time (Power-on Reset Delay) circuit is built-in, and output delay time is adjustable with an external capacitor, and the accuracy is ±16%*. When the supply voltage becomes higher than the released voltage, the reset state will be maintained during the delay time. The output type of the reset is selectable, Nch open-drain, or CMOS. The time out period of the watchdog timer can be also set with an external capacitor, and the accuracy is ±33%*. There are another 4 products by the difference of packages and the function of voltage detector and watchdog timer. The package of R5105N is SOT-23-6.
The Ricoh R5105N series is a CMOS-based microprocessor supervisory circuit designed as a high accuracy, ultra low supply current voltage detector with built-in delay and watchdog timer. It generates a reset output when the supply voltage drops below a threshold or if the system clock is not detected by the watchdog timer.
The device includes an adjustable power-on reset delay time and a configurable watchdog timeout period, both set via external capacitors. The R5105N is available in SOT-23-6 packages with selectable Nch open-drain or CMOS output types.
| Operating Voltage Range | 0.9V to 6.0V |
|---|---|
| Detector Threshold Accuracy | +/-1.0% |
| Power-on Reset Delay Time accuracy | +/-16% |
| Watchdog Timer Timeout Period accuracy | +/-33% |
| Package Type | SOT-23-6 |
| Operating Temperature Range | -40 to 105 C |
It acts as a microprocessor supervisory circuit that generates a reset output when supply voltage drops or the watchdog timer fails to detect the system clock.
The power-on reset delay time and watchdog timeout period can be set using an external capacitor connected to specific pins.
The reset output type is selectable between Nch open-drain or CMOS.