Philips TDA10085HT Single Chip DVB-S/DSS Channel Receiver Data Sheet

This document is the datasheet for TDA10085HT, a single chip demodulator and forward error correction compliant with DSS and DVB-S.


Philips TDA10085HT Single Chip DVB-S/DSS Channel Receiver Data Sheet - cover page
Brand
Philips
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
16
File format
PDF
File size
94 KB
Published
05 July, 2012
Updated
30 September, 2023
MD5 checksum
62208F0B2FD3EF859AF1EE24D1CF58F1

About this manual

The Philips TDA10085HT is an integrated circuit designed as a single-chip channel receiver for satellite television. It matches both DSS (DirecTV) and DVB-S standards, featuring a dual 6-bit Analog-to-Digital Converter (ADC), a PLL allowing the use of low-cost crystals, and comprehensive forward error correction including Viterbi decoding and Reed Solomon decoding.

The device supports variable rate BPSK/QPSK coherent demodulation with rates up to 49 Mbauds and operates at sampling frequencies up to 100 MHz. It includes features such as automatic gain control output, digital symbol timing recovery, carrier offset cancellation, and hardware support for DiSEqc 1.x dish control via an I2C-bus interface.

What's inside

  • Features
  • Applications
  • General Description
  • Ordering Information
  • Block Diagram
  • Pinning
  • Limiting Values
  • Thermal Characteristics
  • Characteristics

Frequently asked questions

What standards is the TDA10085HT compliant with?

The device is compliant with DSS and DVB-S standards.

What type of package does the TDA10085HT use?

It uses a 64-pin TQFP plastic thin quad flat package.

What is the maximum modulation rate supported?

The modulation rate can be variable from 1 to 49 Mbauds.

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