This document is a preliminary specification of Philips Semiconductors SAA3323 drive processor for DCC systems. The drive processor features low power dissipation, single chip digital equalizer, tape formatting, and error correction.
The Philips SAA3323 is an integrated circuit designed to perform drive processor functions in Digital Compact Cassette (DCC) systems. It combines digital equalization, error correction, and tape formatting capabilities into a single chip. The device is intended for use with specific Philips read and write amplifiers and PASC ICs to ensure seamless recording and playback.
| Operating supply voltage | 2.7 to 3.6 V |
|---|---|
| Low power dissipation | 84 mW (typ) |
| ADC type | 8-bit flash |
| IIR filter sections | Two switchable |
| FIR filter per main data channel | 10-tap |
| FIR filter for AUX channel | 10-tap |
| Clock input frequency | 24.576 MHz |
| Clock output frequency (MCLK) | 6.144 MHz |
| Clock output frequency (TCLOCK) | 3.072 MHz |
| Package type | QFP80 / TQFP80 |
It performs the drive processor function in the Digital Compact Cassette (DCC) optimized error correction system.
The digital equalizer is intended for use with DCC read amplifiers TDA1318 or TDA1380.
The tape formatting and error correction circuit is intended for use with write amplifiers TDA1319.
This is a preliminary specification; supplementary data may be published later.