CD54AC273 / CD74AC273 are high performance CMOS logic D-type flip-flops with reset. Information at the D input is transferred to the Q output on the positive-going edge of the clock pulse. All eight flip-flops are controlled by a common clock (CP) and a common reset (MR). Resetting is accomplished by a low voltage level independent of the clock.
The document describes the CD54AC273, CD74AC273, CD54ACT273, and CD74ACT273 devices, which are octal D-type flip-flops utilizing advanced CMOS logic technology. These components feature buffered inputs, a common clock (CP), and a common reset (MR) that operates independently of the clock signal.
| Typical Propagation Delay (Vcc=5V) | 6.5ns |
|---|---|
| Output Drive Current | +24mA |
| Input Capacitance (Max) | 10 pF |
Resetting is accomplished by a low voltage level independent of the clock.
The absolute maximum DC supply voltage rating is 6V.
Each device contains eight D-type flip-flops controlled by a common clock and reset.
The maximum clock frequency is 100 MHz when the supply voltage is 5V.