Supertex VP0300 handbook

Update: 29 September, 2023

This document describes an enhancement-mode (normally-off) transistor that utilizes a vertical DMOS structure and Supertex's well-proven silicon-gate manufacturing process. These transistors have the power handling capabilities of bipolar transistors and the high input impedance and positive temperature coefficient inherent in MOS devices. They are ideally suited for a wide range of switching and amplifying applications where high breakdown voltage, high input impedance, low input capacitance, and fast switching speeds are desired.

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File format: PDF

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MD5 Checksum: 6FD3955BA2443BEA05C6AAD571AB8E32

Publication date: 12 June, 2012

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PDF Link: Supertex VP0300 handbook PDF