This data sheet is about Motorola MC54/74HC573A data sheet, including pin definition, function characteristics and other information.
This document provides technical data for the MC54/74HC573A, an Octal 3-State Noninverting Transparent Latch built with High-Performance Silicon-Gate CMOS technology. The device is identical in pinout to the LS573 and compatible with standard CMOS outputs, as well as LSTTL outputs when used with pullup resistors.
The datasheet details the device's functional operation, where outputs change asynchronously when Latch Enable is high, and data is latched when Latch Enable goes low. It includes maximum ratings, recommended operating conditions, DC and AC electrical characteristics, timing requirements, switching waveforms, and outline dimensions for various package types including Ceramic, Plastic DIP, SOIC, and TSSOP.
| Output Drive Capability | 15 LSTTL Loads |
|---|---|
| Operating Voltage Range | 2.0 to 6.0 V |
| Chip Complexity | 218 FETs or 54.5 Equivalent Gates |
| Internal Gate Propagation Delay | 1.5 ns |
| Speed Power Product | 0.0075 pJ |
| Maximum DC Supply Voltage | +7.0 V |
| Maximum Storage Temperature | -65 to +150 °C |
When Latch Enable is high, the outputs change asynchronously (transparent). When Latch Enable goes low, data meeting setup and hold time becomes latched.
Yes, with pullup resistors, the devices are compatible with LSTTL outputs.