The ICS2309 is a low phase noise, high-speed PLL based, low-skew zero delay buffer. Based on ICS' proprietary low jitter Phase Locked Loop (PLL) techniques, the device provides eight low skew outputs at speeds up to 133 MHz at 3.3 V. The outputs can be generated from the PLL (for zero delay), or directly from the input (for testing), and can be set to tri-state mode or to stop at a low level. The PLL feedback is on-chip and is obtained from the CLKOUT pad. The ICS2309 is available in two different versions. The ICS2309-1 is the base part. The ICS2309-1H is a high drive version with faster rise and fall times.
The ICS2309 is a low phase noise, high-speed PLL-based, low-skew zero delay buffer designed for speeds up to 133 MHz at 3.3 V. It provides eight low skew outputs that can be generated from the PLL for zero delay or directly from the input for testing. The device features full CMOS outputs with 25 mA drive capability and is available in two versions: the base ICS2309-1 and the high drive ICS2309-1H.
| Output Clock Frequency | 10 to 133 MHz |
|---|---|
| Output Skew | <250 ps |
| Device-to-Device Skew | <700 ps |
| Output Drive | 25 mA |
| Operating Voltage | 3.3 V |
| Input Tolerance | 5 V tolerant |
| Package Types | 16-pin SOIC and TSSOP |
The device supports output clock frequencies up to 133 MHz.
The maximum output-to-output skew is less than 250 ps.
Yes, the CLKIN pin is 5V tolerant.