This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. PSD813F2, PSD833F2, PSD834F2, PSD853F2, and PSD854F2 are Flash In-System Programmable (ISP) peripherals designed for 8-bit MCUs, supporting 5V voltage.
This document describes the PSD813F2, PSD833F2, PSD834F2, PSD853F2, and PSD854F2 Flash In-System Programmable (ISP) peripherals designed for 8-bit microcontrollers. The device features dual bank flash memories with up to 2 Mbit of primary memory and 256 Kbit of secondary memory, allowing concurrent read operations while erasing or writing the other bank.
Key capabilities include a PLD with over 3000 gates (CPLD and DPLD), 27 individually configurable I/O ports, and an enhanced JTAG serial port for in-system programming. The datasheet details architectural features such as battery-backed SRAM, power management units, reset timing, and specific register descriptions for memory blocks, instructions, and port configurations.
| Primary Flash Memory Capacity | Up to 2 Mbit |
|---|---|
| Secondary Flash Memory Capacity | Up to 256 Kbit |
| SRAM Capacity | Up to 256 Kbit |
| PLD Gate Count | Over 3000 Gates |
| I/O Ports | 27 Reconfigurable I/O Ports |
| Supply Voltage | 5V +/- 10% |
| Standby Current | As low as 50uA |
| Flash Endurance | 100,000 Erase/WRITE Cycles |
They are Flash In-System Programmable (ISP) peripherals for 8-bit MCUs.
Yes, it supports full-chip In-System Programmability via a built-in JTAG compliant serial port.
Yes, it includes up to 256 Kbit of battery-backed SRAM.