AMD PALCE16V8 Family EE CMOS 20-Pin Universal Programmable Array Logic

This document describes the features and characteristics of the PALCE16V8H-15JI product, including supplier information, technical specifications, and functional descriptions.


AMD PALCE16V8 Family EE CMOS 20-Pin Universal Programmable Array Logic - cover page
Brand
AMD
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
27
File format
PDF
File size
3 MB
Published
07 June, 2012
Updated
29 September, 2023
MD5 checksum
6886A8F0B5B57AFBF3765EB3D0870886

About this manual

The AMD PALCE16V8 is an advanced universal PAL device built with low-power, high-speed, electrically-erasable CMOS technology. It features functionally compatible pinouts and fuse-maps with all 20-pin GAL devices, allowing for direct plug-in replacement of the PAL16R8 and PAL10H8 series.

What's inside

  • Distinctive Characteristics
  • General Description
  • FusionPLD Program
  • Block Diagram
  • Ordering Information
  • Functional Description

Frequently asked questions

What is the maximum propagation delay for the -5 version of this device?

The high-speed CMOS technology provides a 5 ns propagation delay for the *-5* version.

What is the maximum current draw for the Half Power operating condition?

The Half Power option allows a maximum of 130 mA Icc.

How many independently configurable macrocells does the PALCE16V8 contain?

The device has eight independently configurable macrocells labeled MC0 through MC7.

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