MC92053 is a quad-channel Framer chip produced by Motorola for FTTC networks. It supports the DAVIC short-range baseband asymmetrical physical layer standard and communicates with ATM layer devices through the UTOPIA Level 2 interface.
The MC92053 is a semiconductor peripheral designed to implement the DAVIC short-range baseband asymmetrical physical layer standard. It consists of four parallel bidirectional TC-sublayer functional units, each interfacing to an ATM-layer device via a multi-PHY UTOPIA Level 2 compliant interface.
Key features include 8-bit system interface support for generic slave devices, IEEE 1149.1 (JTAG) boundary scan test ports, and operation at 3.3 V with TTL compatibility on I/O pins. The device supports extended temperature operation from -40 to 85 °C and is available in a 208-pin Plastic Quad Flat Package.
| Operating Voltage | 3.3 V |
|---|---|
| Temperature Range | -40 to 85 °C |
| Package Type | 208 Pin Plastic Quad Flat Package |
| Downstream Bit Rate | up to 51.84 Mbit/sec |
| Upstream Bit Rate | up to 6.48 Mbit/s |
| User Device Support | up to 4 user devices |
The primary application is to provide TC-sublayer processing functions for a network device, such as an optical network unit (ONU), in an FTTC network.
Yes, it includes an IEEE 1149.1 (JTAG) boundary scan test port.
The device is composed of four parallel bidirectional TC-sublayer functional units.