The MC92052 is a Motorola company FTTC user framer that supports the DAVIC short-range baseband asymmetrical physical layer standard, and has a maximum speed of 51.84Mbit/sec.
The document describes the MC92052, a semiconductor peripheral device designed for the user side of an FTTC (Fiber-to-the-Curb) drop. It implements downstream and upstream TC-sublayer functionality along with UTOPIA-compliant ATM-layer ports to interface with ATM-layer devices.
Key features include support for DAVIC short-range baseband asymmetrical physical layer standards, downstream bit rates up to 51.84 Mbit/sec, and upstream TDMA at up to 6.48 Mbit/s. The device performs convolutional deinterleaving using an external SRAM or internal RAM, Reed-Solomon encoding/decoding for error correction, and HEC-based cell delineation.
| Downstream Bit Rate | up to 51.84 Mbit/sec |
|---|---|
| Upstream Bit Rate | up to 6.48 Mbit/s |
| Operating Voltage | 3.3 V |
| Temperature Range | -40 to 85 °C |
| Package Type | 128 Pin Plastic Quad Flat Package |
The primary application is to provide TC-sublayer processing functions for a user device, such as a set-top box, in an FTTC network.
Yes, it provides an IEEE 1149.1 (JTAG) boundary scan test port.