This document describes the M95640 and M95320 serial SPI bus EEPROMs with high-speed clock and various features. They are compatible with the SPI bus serial interface, support a single supply voltage, and have adjustable size read-only EEPROM area, byte and page write functions, and self-timed programming cycle. Additionally, they feature enhanced ESD protection, more than 100,000 or 1,000,000 erase/write cycles (depending on ordering options), and more than 40-year data retention.
This document describes the M95640 (64kbit) and M95320 (32Kbit) electrically erasable programmable memory devices. These chips are accessed via a high-speed Serial Peripheral Interface (SPI)-compatible bus, supporting positive clock SPI modes with adjustable clock rates up to 10MHz.
The datasheet details the device features including hardware protection of the status register, byte and page write capabilities, self-timed programming cycles, and enhanced ESD protection. It provides comprehensive information on operating conditions, electrical characteristics, timing diagrams, and mechanical package data for various pin configurations.
| Memory Capacity (M95640) | 8192 x 8 bit |
|---|---|
| Memory Capacity (M95320) | 4096 x 8 bit |
| Supply Voltage (Standard) | 4.5 to 5.5V |
| Supply Voltage (-W variant) | 2.5 to 5.5V |
| Supply Voltage (-R variant) | 1.8 to 5.5V |
| Max Clock Rate | 10MHz |
| Write Time | 5ms or 10ms |
| Erase/Write Cycles | >100,000 or >1 million |
| Data Retention | >40 Years |
The devices support CPOL=0, CPHA=0 and CPOL=1, CPHA=1 modes.
Output data bytes are shifted out most significant bit first on the falling edge of the Serial Clock.
It freezes the size of the memory area protected against write instructions based on Status Register bits.