This is a summary of the MCM67J518 datasheet. It is a 32K x 18-bit high-speed SRAM for the i486 and Pentium microprocessors' cache. It includes input registers, a 2-bit counter, high-speed SRAM, and high drive registered output drivers, integrated into a single monolithic circuit for reduced part count implementation of cache data RAM applications.
The Motorola MCM67J518 is a 589,824-bit synchronous static random access memory designed to provide a burstable, high-performance secondary cache for the i486 and Pentium microprocessors. Organized as 32,768 words of 18 bits, it integrates input registers, a 2-bit counter, high-speed SRAM, and high-drive registered output drivers onto a single monolithic circuit using Motorola's high-performance silicon-gate BiCMOS technology.
| Memory Size | 32K x 18 Bit |
|---|---|
| Technology | silicon-gate BiCMOS |
| Package Type | 52-Lead PLCC |
| Operating Temperature | 0 to +70 °C |
| Supply Voltage | 5.0 V+5% |
| Access Time (100 MHz) | 6 ns |
The device can operate at temperatures up to +70 °C.
The maximum power dissipation is 1.6 W.
The operating voltage range is from 4.75 V to 5.25 V.