The ICS952802 from Integrated Circuit Systems is a two-chip clock solution for desktop designs using SiS755/760-style chipsets. The datasheet describes its use with a zero-delay buffer such as the ICS9179-16 for PC133 or the ICS93735 for DDR applications to provide the necessary clock signals for the system.
The device has differential push-pull K8CPU outputs plus PCI, AGP, REF, ZCLK and 24/48 MHz outputs. It uses a serially programmable I2C interface to set output frequency, divider ratios, spread percentage, output skew and output strength, and includes watchdog timer and reset functions. The document also gives pin descriptions, I2C read/write procedures and a frequency selection table.
| CPU output jitter | <250 ps |
|---|---|
| AGP output jitter | <250 ps |
| External reference input | 14.318 MHz |
| Reference and crystal power supply | 3.3 V nominal |
| CPU outputs | 2 pairs of differential push-pull K8CPU outputs |
| PCI clocks | 10 at 3.3 V |
It is a two-chip clock solution for desktop designs using SiS 755/760 style chipsets. It can be used with a zero-delay buffer for PC133 or DDR applications.
It uses a serially programmable I2C interface to configure frequency settings, divider ratios, spread percentage, output skew, output strength and individual output clocks.
It uses an external 14.318MHz reference input.
It provides a safe setting under unstable system conditions.