This document is about AN86-1 A Standards Lab Grade 20-Bit DAC with 0.1ppm/°C Drift application note
The document details a method to achieve high-precision 20-bit DAC performance without frequent calibration by utilizing an analog-to-digital converter in a feedback loop. This architecture corrects for the slave DAC's drift and nonlinearity, relying on the stability of the master A-to-D converter (LTC2400) and voltage reference.
The note provides circuitry details, including a schematic using two composite DACs and an output amplifier driven by the LT1010. It also presents measured performance characteristics such as linearity within 1ppm over all codes, offset error drift of 0.01ppm/°C, and settling times for full-scale and small steps.
| Resolution | 1ppm |
|---|---|
| Full-Scale Error Drift | 0.04ppm/°C Exclusive of Reference |
| Offset Error | 0.5ppm |
| Nonlinearity | +2ppm, Trimmable to Less Than 1ppm |
| Output Noise | 0.2ppm (=0.9uV) |
| Slew Rate | 0.033V/us |
The system achieves a resolution of 1ppm.
It uses an LTC2400 A-to-D converter as a feedback element to continuously correct the slave DAC's drift and nonlinearity.
The full-scale DAC settling time to within 1ppm requires about 1400 milliseconds.