UPA836TC NPN Silicon Epitaxial Twin Transistor features a small package outline and low height profile to achieve excellent electrical performance.
The NEC UPA836TC is an NPN silicon epitaxial twin transistor offered in an ultra‑small TC (SOT‑363) package measuring 1.5 mm × 1.1 mm with a height of 0.55 mm. The flat‑lead style reduces lead inductance, making it suitable for portable wireless applications.
The sheet lists electrical parameters such as collector cutoff current, DC current gain, gain‑bandwidth product, and power gain, as well as absolute maximum ratings for collector current (30 mA), collector‑to‑base voltage (9 V), collector‑to‑emitter voltage (6 V) and emitter‑to‑base voltage (2 V). Ordering information and packaging details are also provided.
| Package outline | 1.5 mm × 1.1 mm |
|---|---|
| Package height | 0.55 mm |
| Maximum collector current (Ic) | 30 mA |
| Collector‑to‑Base voltage (VcBO) | 9 V |
The device is rated for 9 V collector‑to‑base, 6 V collector‑to‑emitter, and 2 V emitter‑to‑base.