This document introduces the AD9920A product, which is a highly integrated charge-coupled device (CCD) signal processor for digital still camera applications. It includes 19-channel V-driver, 1.8V AFETG core, 24 programmable vertical clock signals, correlated double sampler (CDS) with −3dB, 0dB, +3dB, and +6dB gain, 12-bit, 40.5MHz analog-to-digital converter (ADC), black level clamp with variable level control, complete on-chip timing generator, Precision Timing core with ~400ps resolution, on-chip 3V horizontal and RG drivers, general-purpose outputs (GPOs) for shutter and system support, on-chip sync generator with external sync input, on-chip 1.8V low dropout (LDO) regulator, 105-ball, 8mm×8mmCSP_BGA package.
The AD9920A 12‑Bit CCD Signal Processor integrates a complete analog front‑end, a 12‑bit ADC, a programmable timing generator and a 19‑channel vertical driver. It provides up to 24 programmable vertical clock signals, on‑chip GPOs for shutter control, and a precision timing core with ~400 ps resolution at 40.5 MHz.
The device operates from –25 °C to +85 °C, supports multiple power‑supply domains, and includes detailed specifications for digital, analog, timing and vertical driver performance. It is intended for use in digital still‑camera applications where high‑speed, high‑precision CCD readout is required.
| Operating temperature range | -25 °C to +85 °C |
|---|---|
| AVDD analog supply voltage | 1.6 V – 2.0 V (typ 1.8 V) |
| ADC resolution | 12 bits |
| Maximum clock rate (CLI) | 40.5 MHz |
| V‑driver logic supply (VDVDD) | 1.6 V – 3.6 V (typ 3.0 V) |
| Typical output current | 60 mA – 100 mA |
The device operates from –25 °C to +85 °C.
It uses a 12‑bit analog‑to‑digital converter.
The timing generator can support up to 24 vertical clock signals.
The device includes an integrated 19‑channel V‑driver.