This document is about the specification of eZ80L92 chip
This specification document describes the eZ80L92 8‑bit microcontroller, covering its architecture, pin layout, register map, and all on‑chip peripherals. It includes sections on CPU core features, low‑power modes, clocking options, GPIO, timers, UART, SPI, I²C, infrared encoder/decoder, and the ZiLOG Debug Interface.
Key information such as electrical characteristics, recommended crystal oscillator configurations, packaging details, and ordering information are also provided, making it a comprehensive reference for designers and engineers integrating the eZ80L92 into their products.
| Maximum operating frequency | 50 MHz |
|---|---|
| Maximum drive level (50 MHz crystal) | 100 µW |
| Maximum load capacitance (CL) for 50 MHz crystal | 20 pF |
| Maximum drive level (32 kHz crystal) | 1 µW |
The eZ80L92 can operate up to 50 MHz.
The specification includes a Watch‑Dog Timer Control Register, Reset Register, and a table of approximate time‑out delays.