This document describes the features and characteristics of a digital television processor, including a digital television system-on-chip, on-chip DVB-T COFDM demodulator, multiple video output interfaces, low power consumption, support for external MPEG-2 transport streams, conditional access, etc.
The ZL10310 and ZL10311 are low‑power, small‑footprint System‑on‑Chip solutions for DVB‑T receivers. They integrate a PowerPC 405™ core, MPEG‑2 audio/video decoders, on‑chip video DACs, and a COFDM demodulator, enabling compact set‑top boxes, TV adaptors, and integrated digital televisions.
The devices provide a rich set of peripheral interfaces—including IDE, SDRAM, Flash, IR, UART, Smart‑Card, and Common Interface control—plus optional external demodulator inputs. The ZL10311 adds Dolby® Digital multi‑channel audio decoding and Macrovision copy protection support.
| Power consumption | <1.4 W typical |
|---|---|
| Core processor | PowerPC 405™ running at 108 MHz |
| Instruction / data cache size | 16 kB each |
| Video DACs | 6 on‑chip video DACs for composite or component output |
| Audio inputs | 12‑bit digital audio input |
| Audio outputs | 12‑bit and S/PDIF digital audio outputs |
| Operating temperature range | 0 °C to +70 °C |
| SDRAM interface | Unified 64 Mbit SDRAM interface |
Both devices integrate a PowerPC 405™ processor core running at 108 MHz.
The chips consume less than 1.4 W typical (under 4 W in full operational mode for the ZL10310).