Update: 30 September, 2023
CAT25C128/256 is a 128K/256K-bit SPI Serial CMOS E2PROM internally organized as 16Kx8/32Kx8 bits. Catalyst’s advanced CMOS Technology substantially reduces device power requirements. CAT25C128/256 features a 64-byte page write buffer. The device operates via the SPI bus serial interface and is enabled through a Chip Select (CS). In addition to the Chip Select, the clock input (SCK), data in (SI) and data out (SO) are required to access the device. The HOLD pin may be used to suspend any serial communication without resetting the serial sequence. CAT25C128/256 is designed with software and hardware write protection to protect data from accidental erasure.
File format: PDF
Size: -
MD5 Checksum: D72025D52ED4CB067D057651134B221D
Publication date: 07 May, 2012
Downloads: -
PDF Link: CATALYST CAT25C128/256 128K/256K-Bit SPI Serial CMOS E 2 PROM Manual PDF