LP62S2048-I series is a 256K X 8-bit low voltage CMOS SRAM with a power supply voltage range of 2.7V to 3.3V, 70/100ns (max) access time, low power version and very low power version operating and standby currents of 30mA (max) and 50µA (max) and 10µA (max), no clock or refresh required, all inputs and outputs are directly TTL compatible, common I/O using three-state output, output enable and two chip enable inputs for easy application, 2V (min) data retention voltage, and 32-pin SOP, TSOP, TSSOP (8 X 13.4mm) and 36-pin CSP packages are available
The LP62S2048-I series is a 256 K × 8‑bit static RAM that operates from a low supply voltage of 2.7 V to 3.3 V. It features full static operation with no clock or refresh required, TTL‑compatible inputs and three‑state outputs, and data retention down to 2 V.
The device is offered in 32‑pin SOP, TSOP, TSSOP and 36‑pin CSP packages, with detailed timing, electrical characteristics and absolute maximum ratings provided for design engineers.
| Supply voltage range | 2.7 V to 3.3 V |
|---|---|
| Access time | 70 ns (typ) to 100 ns (max) |
| Operating current (low power) | 30 mA max |
| Standby current (low power) | 50 µA max |
| Standby current (very low power) | 10 µA max |
| Data retention voltage | 2 V min |
| Input high voltage | 2.0 V |
| Input low voltage | -0.3 V |
| Output load capacitance | 30 pF |
It operates from 2.7 V up to 3.3 V.
The access time is 70 ns typical and up to 100 ns maximum.