The AD679 is a 14-bit 128 kSPS complete sampling ADC that combines a high-speed sample-hold amplifier (SHA), ADC, 5 V reference, clock, and digital interface on a single chip. It provides a fully specified sampling A/D function unattainable with discrete designs.
The AD679 is a monolithic 14‑bit analog‑to‑digital converter that integrates a sample‑hold amplifier, voltage reference, clock generation and a microprocessor‑compatible 8‑bit bus interface on a single chip. It offers 128 kSPS conversion rate, 1 MHz full‑power bandwidth and 500 kHz full‑linear bandwidth, suitable for both signal‑processing and measurement applications.
The device is available in several packages (28‑pin plastic DIP, ceramic DIP and 44‑lead JLCC) and operates from +5 V and +12 V supplies with a typical power consumption of 560 mW. Various grades (K, B, T, etc.) provide fully specified AC and DC performance parameters.
| Resolution | 14 bits |
|---|---|
| Full Power Bandwidth | 1 MHz |
| Full Linear Bandwidth | 500 kHz |
| Maximum Conversion Rate | 128 kSPS |
| Input Resistance | 10 MΩ |
| Power Consumption (typ) | 560 mW |
The AD679 can perform up to 128 kSPS conversions.
The device operates from +5 V and +12 V supplies.
The input resistance is 10 MΩ.