AD9517-3 is an output clock generator with an integrated 2.0 GHz VCO. It features low phase noise, a phase-locked loop (PLL), automatic revertive and manual reference switchover/holdover modes, multiple reference input interfaces, programmable delays, digital or analog lock detect, etc.
The AD9517-3 provides a multi‑output clock distribution function with sub‑picosecond jitter performance. It includes an on‑chip PLL and VCO that tune from 1.75 GHz to 2.25 GHz, and can accept an external VCO/VCXO up to 2.4 GHz for higher frequencies. The device supports LVPECL, LVDS, and CMOS output formats, with programmable dividers and fine‑delay adjustments for each channel.
Typical applications include high‑speed networking line cards, data‑converter clocking, high‑performance wireless transceivers, and test instrumentation where low jitter and low phase‑noise are critical. The part is supplied in a 48‑lead LFCSP package and operates over an industrial temperature range of –40 °C to +85 °C.
| On‑chip VCO frequency range | 1.75 GHz – 2.25 GHz |
|---|---|
| External VCO/VCXO frequency range (optional) | up to 2.4 GHz |
| Supply voltage (Vs) | 3.3 V ±5% (3.135 V – 3.465 V) |
| Operating temperature range | –40 °C to +85 °C |
| LVPECL output maximum frequency | 1.6 GHz |
| LVDS output maximum frequency | 800 MHz |
| CMOS output maximum frequency | 250 MHz |
| Additive output jitter (LVPECL) | 225 fs rms |
| Channel‑to‑channel skew (paired outputs) | <10 ps |
The on‑chip VCO tunes from 1.75 GHz to 2.25 GHz.
It operates from a 3.3 V supply (3.135 V – 3.465 V typical) and can use a 5 V charge‑pump supply when an external VCO is used.
The device is specified for –40 °C to +85 °C operation.
It provides four LVPECL outputs arranged in two pairs.