Freescale MC9S12D-Family 16‑Bit Microcontroller Product Brief

MC9S12D-Family is a 16-bit flash-based microcontroller designed for automotive multiplexing applications. It offers fully pin compatible options for different memory and peripheral choices for scalable designs. All MC9S12D-Family members have standard on-chip peripherals, including a 16-bit central processing unit (CPU12), up to 512K bytes of Flash EEPROM, 14K bytes of RAM, 4K bytes of EEPROM, two asynchronous serial communications interfaces (SCI), three serial peripheral interfaces (SPI), IIC-bus, an enhanced capture timer (ECT), two 8-channel 10-bit analog-to-digital converters (ADC), an eight-channel pulse-width modulator (PWM), J1850 interface, and up to five CAN 2.0 A, B software compatible modules (MSCAN12). System resource mapping, clock generation, interrupt control, and bus interfacing are managed by the system integration module (SIM). The MC9S12D-Family has full 16-bit data paths throughout, but the external bus can operate in an 8-bit narrow mode for lower cost systems. The inclusion of a PLL circuit allows power consumption and performance to be adjusted according to operational requirements. In addition to the I/O ports available in each module, up to 22 I/O ports with interrupt capability are available for Wake-Up from STOP or WAIT mode.


Freescale MC9S12D-Family 16‑Bit Microcontroller Product Brief - cover page
Brand
Freescale
Category
Other Electronics
Document type
Product Leaflet
Language
English
Pages
14
File format
PDF
File size
414 KB
Published
10 April, 2012
Updated
29 September, 2023
MD5 checksum
754372E1388F6FF37631E2A2FF9239A6

About this manual

The MC9S12D‑Family is a 16‑bit Flash‑based microcontroller line aimed at automotive multiplexing applications. All members share a 16‑bit CPU12 core, up to 512 KB Flash, up to 14 KB RAM, up to 4 KB EEPROM, and a rich set of on‑chip peripherals including SCI, SPI, I²C, ADCs, PWM, J1850, and up to five CAN 2.0 modules.

The devices are offered in 112‑pin LQFP or 80‑pin QFP packages with configurable I/O, PLL‑based clock generation, and development support such as single‑wire background debug (BDM). Detailed pin‑assignments, memory maps, and package dimensions are provided, and further information can be obtained from www.freescale.com.

What's inside

  • Product Brief
  • Features
  • Analog‑to‑Digital Converters
  • CAN Interface
  • Enhanced Capture Timer (ECT)
  • PWM Channels
  • Serial Interfaces
  • SAE J1850 Compatible Module
  • System Integration Module (SIM)
  • Clock Generation

Specifications

CPU core16‑bit CPU12
Flash memoryup to 512 KB
SCI interfaces2 asynchronous serial communications interfaces
SPI interfaces3 serial peripheral interfaces
ADC modules2 × 8‑channel 10‑bit converters
PWM channels8‑channel pulse‑width modulator
CAN modulesup to 5 CAN 2.0 A/B modules
Clock generatorPhase‑locked loop multiplier
Package types112‑Pin LQFP or 80‑Pin QFP
Debug supportSingle‑wire background debug (BDM)

Frequently asked questions

What is the maximum Flash memory size available in the MC9S12D family?

The family supports up to 512 KB of Flash EEPROM.

How many CAN modules can the MC9S12D family support?

It can accommodate up to five CAN 2.0 A/B software‑compatible modules.

What package options are offered for the MC9S12D microcontrollers?

Devices are available in 112‑Pin LQFP and 80‑Pin QFP packages.

What debug mode is provided for development?

A single‑wire background debug (BDM) mode is included.

Download PDF (414 KB)

More Freescale Manuals


View all Freescale manuals →