Intersil HIP1011D/HIP1011E Dual Slot PCI Hot Plug Controllers Datasheet

This is the English manual for HIP1011D, HIP1011E


Intersil HIP1011D/HIP1011E Dual Slot PCI Hot Plug Controllers Datasheet - cover page
Brand
Intersil
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
15
File format
PDF
File size
326 KB
Published
28 March, 2012
Updated
30 September, 2023
Model
HIP1011
MD5 checksum
DBF77866AFA018F10BB5BAC39907C31B

About this manual

The HIP1011D and HIP1011E are dual‑slot PCI Hot‑Plug controller ICs that provide independent power control and protection for two adjacent PCI slots. They integrate on‑chip MOSFET switches for +12 V and –12 V, support programmable over‑current thresholds, and offer turn‑off delay adjustability to filter transients.

The document lists electrical specifications such as supply voltage ranges, over‑current trip thresholds, and on‑resistance values, and provides design recommendations for PCB layout, decoupling, and component selection. Pin descriptions, absolute maximum ratings, and a typical application schematic are also included.

What's inside

  • Features
  • Applications
  • Ordering Information
  • Pinout
  • Pin Descriptions
  • Absolute Maximum Ratings
  • Electrical Specifications
  • Introduction
  • Key Feature Description and Operation
  • Customizing Circuit Performance

Specifications

Independent Power Control of 2 PCI SlotsYes
Turn‑Off Delay Time AdjustabilityUser selectable via FLTN capacitor
Internal MOSFET Switches for +12 V and –12 V OutputsIntegrated
Adjustable Overcurrent Protection for All Eight SuppliesSet by resistor on OCSET pin
100 ns Response Time to Overcurrent100 ns
Minimum Gate Timing Capacitor0.033 µF

Frequently asked questions

What does the FLTN pin indicate?

FLTN is a fault output pin; a LOW level indicates a fault condition.

How is the over‑current threshold programmed?

By connecting a resistor between the OCSET pin (pin 10) and ground.

Does the HIP1011E monitor undervoltage conditions?

No, UV references do not apply to the HIP1011E.

What capacitor value is recommended for the gate‑timing pins?

A minimum of 0.033 µF is recommended for each gate‑timing capacitor.

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