This document describes the features and characteristics of the HI-303 dual SPDT CMOS analog switch, including break-before-make switching, low and nearly constant ON resistance over the full analog signal range, and low power dissipation. The switch is TTL compatible and has a logic “0” condition with an input less than 0.8V and a logic “1” condition with an input greater than 4V.
The HI-303 is a dual, single‑pole‑double‑throw (SPDT) CMOS analog switch fabricated with Intersil's dielectric isolation process. It offers break‑before‑make switching, low and nearly constant on‑resistance across the full analog signal range, and low power dissipation. The device is TTL compatible, with a logic “0” below 0.8 V and a logic “1” above 4 V.
The datasheet provides absolute maximum ratings, operating conditions, thermal information, electrical specifications, and typical performance curves. It also includes ordering information, package dimensions for CERDIP and SOIC variants, and test circuit examples for designers.
| Analog Signal Range | +15 V to –15 V |
|---|---|
| Logic Level "1" Input Voltage | > 4 V |
| Logic Level "0" Input Voltage | < 0.8 V |
A logic “1” is recognized when the input voltage is greater than 4 V.