This document describes a high-performance, low-power AVR® 8-bit microcontroller with advanced RISC architecture and high-endurance non-volatile memory. It supports various peripheral features.
The ATmega64 and ATmega64L are low‑power 8‑bit CMOS microcontrollers based on Atmel's AVR enhanced RISC architecture. They offer up to 64 KB of in‑system programmable Flash, 2 KB EEPROM, 4 KB SRAM, 53 programmable I/O lines, multiple timers, PWM channels, and a 10‑bit ADC. The devices support a range of operating speeds (0‑8 MHz for ATmega64L, 0‑16 MHz for ATmega64) and voltage supplies (2.7‑5.5 V for ATmega64L, 4.5‑5.5 V for ATmega64).
The manual includes pin‑out diagrams, detailed port descriptions (Ports A‑G), reset and power pin functions, and information on programming interfaces such as SPI, JTAG, and two‑wire serial. Compatibility with the older ATmega103 is described, along with notes on package options (64‑lead TQFP, 64‑pad QFN/MLF) and available development resources.
| Flash program memory | 64 KB |
|---|---|
| EEPROM | 2 KB |
| SRAM | 4 KB |
| Programmable I/O lines | 53 |
| Operating voltage (ATmega64L) | 2.7 V – 5.5 V |
| Operating voltage (ATmega64) | 4.5 V – 5.5 V |
| Maximum clock speed | 0‑8 MHz (ATmega64L), 0‑16 MHz (ATmega64) |
| ADC | 8‑channel, 10‑bit |
| Package options | 64‑lead TQFP, 64‑pad QFN/MLF |
| JTAG interface | IEEE std. 1149.1 compliant |
The ATmega64 provides 64 KB of in‑system programmable Flash memory.
The ATmega64L operates from 2.7 V to 5.5 V.
The device offers 53 programmable I/O lines.
Yes, it includes a JTAG interface compliant with IEEE 1149.1.