Analog Devices AD7722 Datasheet

The AD7722 is a complete low power, 16-bit, Σ-∆ ADC from Analog Devices. It operates from a 5 V supply and accepts a differential input voltage range of 0 V to +2.5 V or ±1.25 V centered around a common-mode bias. The AD7722 provides 16-bit performance for input bandwidths up to 90.625 kHz.


Analog Devices AD7722 Datasheet - cover page
Brand
Analog Devices
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
24
File format
PDF
File size
369 KB
Published
24 March, 2012
Updated
30 September, 2023
Model
AD7722
MD5 checksum
C9C6AC8BCE606E283CF8A3CB2D0EE22D

About this manual

The AD7722 is a low‑power, 16‑bit, 195 kSPS CMOS ADC that integrates a 2.5 V on‑chip reference and operates from a single 5 V supply. It features a continuous‑sampling modulator, FIR digital filters, and offers both high‑speed parallel and serial interfaces for data output.

The device is supplied in a 44‑lead MQFP package, rated for industrial temperatures from –40 °C to +85 °C, and includes comprehensive pin functions, timing specifications, and absolute‑maximum ratings for reliable integration into signal‑processing systems.

What's inside

  • Features
  • General Description
  • Functional Block Diagram
  • Specifications
  • Static Performance
  • Logic Inputs
  • Power Supplies
  • Absolute Maximum Ratings
  • Pin Function Descriptions
  • Outline Dimensions

Specifications

Resolution16 Bits
Maximum Output Word Rate195 kSPS
Input Bandwidth0 kHz – 90.625 kHz
Power Consumption375 mW
Operating Temperature Range-40 °C to +85 °C
On‑Chip Reference Voltage2.5 V
Package44‑lead MQFP

Frequently asked questions

What is the maximum sampling rate of the AD7722?

The AD7722 can output data at up to 195 kSPS word rate.

What supply voltages does the AD7722 require?

It operates from a single 5 V supply (AVpp and DVpp 5 V ± 5%).

How can the AD7722 be interfaced to a processor?

The device provides a high‑speed parallel or serial interface for data output.

How is calibration performed on the AD7722?

A logic‑high pulse on the CAL pin for one CLKIN cycle initiates a gain and offset calibration sequence.

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