Key facts
- Brand
- WIZnet
- Model
- W5500
- Category
- Other Electronics
- Industry
- Electronics
- Documents
- 2
- Languages
- ZH
- Last added
- 2026-10-03
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WIZnet W5500 Datasheet
The W5500 is a full‑hardware TCP/IP embedded Ethernet controller that integrates a MAC, PHY, and a complete TCP/IP stack, enabling simple network connectivity for embedded systems. It supports up to eight independent hardware sockets and offers a high‑speed SPI interface.
Key features include an internal 32 KB buffer, support for TCP, UDP, ICMP, IPv4, ARP, IGMP and PPPoE, power‑down and Wake‑on‑LAN modes, and a 3.3 V core with 5 V‑tolerant I/O. The datasheet covers pin assignments, host interface details, register maps, electrical specifications, and package information. This manual is written in Chinese.
WIZnet W5500 specifications
| Number of hardware sockets | 8 |
|---|---|
| SPI clock rate | Up to 80 MHz |
| Operating voltage | 3.3 V core, I/O 5 V tolerant |
| Internal buffer size | 32 KB |
| Supported protocols | TCP, UDP, ICMP, IPv4, ARP, IGMP, PPPoE |
| Package | LQFP48, 7 × 7 mm, 0.5 mm pitch |
Source: WIZnet W5500 Datasheet
All WIZnet W5500 documents by type
Ratings, dimensions and ordering codes, for selection and design work.
Questions answered in these manuals
How many hardware sockets does the W5500 support?
It supports eight independent hardware sockets for simultaneous communication.
From: WIZnet W5500 Datasheet
What is the maximum SPI clock frequency for the W5500?
The SPI interface can operate at up to 80 MHz.
From: WIZnet W5500 Datasheet
How many hardware sockets does the W5500 support?
The W5500 supports eight independent hardware sockets.
Does the W5500 support automatic MDIX (auto‑crossover)?
No, the W5500 does not support automatic polarity reversal; a straight‑through cable must be used for connections to switches or routers.