About this manual
The S3C2410A storage controller provides the necessary control signals for external memory devices. It supports both little‑ and big‑endian modes, eight memory banks, and programmable bank sizes for banks 1‑7.
The document describes the register map, bank address layout, timing parameters, and SDRAM refresh modes, including detailed pin assignments and configuration registers for each bank. This manual is written in Chinese.
What's inside
- Overview
- Features
- Memory Bank Configuration
- SDRAM Interface
- Register Map
- Timing Parameters
- Pin Assignments
Specifications
| SDRAM auto‑refresh support | Yes |
|---|
Frequently asked questions
Does the controller support SDRAM self‑refresh mode?
Yes, it supports SDRAM self‑refresh and auto‑refresh modes.
