The ADSP-21065L SHARC is a high-performance, 32-bit digital signal processor for communications, digital audio, and industrial instrumentation applications. Along with a high-performance, 180 MFLOPS core, the ADSP-21065L has a dual-ported, on-chip SRAM and integrated I/O peripherals supported by a dedicated I/O processor. With its on-chip instruction cache, the processor can execute every instruction in a single cycle. The ADSP-21065L is code-compatible with other members of the SHARC family. Four independent buses for dual data, instructions, and I/O, and crossbar-switch memory connections implement the ADSP-21065L’s Super Harvard Architecture. The ADSP-21065L provides features such as 32-bit IEEE floating-point computation units, data register file, data address generators, program sequencer with instruction cache, user-configurable dual-ported SRAM, external port for glueless interface, host port and multiprocessor interface, DMA controller, serial ports with TDM and I2S support, programmable timers, general-purpose I/O ports, and JTAG test access port.
The ADSP-21065L SHARC is a high-performance, 32-bit digital signal processor designed for communications, digital audio, and industrial instrumentation applications. It features a high-performance 180 MFLOPS core, dual-ported on-chip SRAM, and integrated I/O peripherals supported by a dedicated I/O processor.
The processor implements a Super Harvard Architecture with four independent buses for data, instructions, and I/O, allowing it to execute every instruction in a single cycle. Key architectural features include a 32-bit IEEE floating-point computation unit, dual address generators, and support for high-level languages and operating systems.
| Floating-point performance | 180 MFLOPS |
|---|---|
| On-chip SRAM | 544 Kbits |
| Instruction execution | Single cycle |
| DMA channels | Ten |
| Serial ports | Two receivers and two transmitters |
| Timers | Two programmable |
| General-purpose I/O ports | Twelve |
It is designed for communications, digital audio, and industrial instrumentation applications.
The processor features a high-performance core capable of 180 MFLOPS.
Yes, the ADSP-21065L is code-compatible with other members of the SHARC family.